This invention relates to a semiconductor device including a semiconductor region having a pn junction and a field shaping region located adjacent the pn junction to increase the reverse breakdown voltage of the device.
FIG. 1A of the accompanying drawings shows the structure of a known simple semiconductor pn junction diode device 100. A rectifying junction 101 is formed between a p type region 102 and an n type region 103, regions 102 and 103 being connected to device metal electrodes 104 and 105 respectively via same conductivity more highly doped p+ and n+ regions 106, 107. The reverse breakdown voltage of the diode is strongly related to the allowed maximum electric field (about 0.2 MV/cm for semiconductor silicon). The breakdown voltage depends therefore on the concentration of the equilines of voltage within the edges 108, 109 of the depletion region to either side of the pn junction 101, and thus the extent of the depletion region, which depends on the doping levels at both sides of the pn junction.
The direct relation between doping level and breakdown voltage as occurring in the simple diode shown in FIG. 1A can be circumvented by a variety of known structures all using what is well known as the RESURF mechanism.
One example of a document disclosing RESURF mechanism structures is U.S. Pat. No. 4,754,310 (our reference PHB32740), the contents of which are hereby incorporated by reference. In this US patent examples are disclosed of power devices including rectifier diodes, field effect transistors and bipolar transistors. In the case of a simple rectifier diode there is a structure which is equivalent to that shown schematically in FIG. 1B of the accompanying drawings. In the diode 100B structure shown in FIG. 1B, which has alternating p type and n type zones, the electric field and the edges 108B, 109B of the depletion region are stretched over a larger distance to either side of the pn junction at the same reverse voltage. This leads to higher breakdown voltages. In the case of a field effect transistor a trade off relationship between the on-resistance and the breakdown voltage of the field effect transistor is addressed by providing the drain drift region as a zone formed of first regions of one conductivity type interposed with second regions of the opposite conductivity type, in similar manner to the alternating p type and n type zones shown for a diode in FIG. 1B of the accompanying drawings. The major problem with these arrangements is that there has to be a very good balance of P and N doping in the alternating p type and n type ozones.
International patent application published as WO-A-01159847, the contents of which are hereby incorporated herein by reference (our reference PHNL 000066) provides another way of improving the trade off between breakdown voltage and on resistance in the case of vertical high voltage insulated gate field effect devices. Field shaping regions extend through the drain drift region from the body regions of the device to the drain region. These field shaping regions are semi-insulative or resistive regions which provide current leakage paths from the source regions when the device is non-conducting and a voltage is applied between the main electrodes of the device so as to cause an extension of a depletion region in the drain drift region towards the drain region to increase the reverse breakdown voltage of the device. The small leakage current along the resistive paths causes a linear electrical potential drop along these paths. Hence a substantially constant vertical electric field is generated along these paths and accordingly in the adjacent drain drift region, and this results in the breakdown voltage being greater than for a non-uniform electric field which would occur in the absence of the field shaping region. Thus, as for the invention of U.S. Pat. No. 4,754,310, for a given required breakdown voltage of the device, it is possible to increase the doping concentration of the drain drift region and hence reduce the on-resistance of the device compared with a conventional device.
International patent application published as WO-A-03/015178, the contents of which are hereby incorporated herein by reference, (our reference PHNL010570) discloses a bipolar transistor structure, comprising: a collector including a higher doped collector region of semiconductor material of a first conductivity type doped to a first concentration; an emitter region of semiconductor material of the first conductivity type; a base region of semiconductor material of a second conductivity type opposite to the first conductivity type between the emitter region and the collector; the collector further including a lower doped drift region extending between the higher doped collector region and the base region, the drift region being of the first conductivity type and doped to a second concentration lower than the first concentration; a trench extending adjacent to the drift region; and a gate within the trench insulated from the drift region for controlling the drift region to be depleted of carriers in a voltage blocking mode of operation. The drift region in the collector is of lower doping concentration than the higher doped region of the collector so that the drift region may be depleted of carriers. Using the gate in the trench the drift region can be depleted even with a higher doping in the drift region than would otherwise be possible. This allows the product of the cut off frequency and the breakdown voltage to be increased as compared with prior art structures. Conveniently, the structure may be a vertical structure formed on a semiconductor body having opposed first and second faces. The emitter region may be connected to the first face and the collector region to the second face. The trench may extend substantially perpendicularly to the first face through the emitter and base regions to the drift region. In alternative embodiments, a lateral structure may be provided, for example using an insulated buried layer as the gate. The gate may be of a semi-insulating material, and the structure may further comprise a first gate connection at the end of the gate adjacent to the boundary between the drift region and the base region and a second gate connection at the boundary between the drift region and the higher doped collector region. This allows a uniform field to be applied along the gate thereby providing a uniform field in the drift region to minimise the risk of breakdown at low voltages. The uniform field is achieved without complex doping profiles in the drift region being necessary.
International Patent Application published as WO-A-03/043089, the contents of which are hereby incorporated by reference, (our reference PHNL020937) concerns an invention in which there is provided a field effect transistor semiconductor device comprising a source region, a drain region and a drain drift region, the device having a field shaping region adjacent the drift region and arranged such that, in use, when a reverse voltage is applied between the source and drain regions and the device is non-conducting, a substantially constant electric field is generated in the field shaping region and accordingly in the adjacent drift region, characterised in that the field shaping region is arranged to function as a capacitor dielectric region between a first capacitor electrode region and a second capacitor electrode region, the first and second capacitor electrode regions being adjacent respective ends of the dielectric region and having different electron energy barriers.
By substantially constant electric field it is meant therein that the maximum electric field in the field shaping region and hence in the adjacent drift region at a given voltage is reduced in comparison with the absence of the field shaping region with the consequence that the breakdown voltage of the device is comparatively greater.
In a device according to WO-A-03/043089, it is the different electron energy barriers of the first and second capacitor electrode regions which ensure that in use, when a voltage is applied between the source and drain regions and the device is non-conducting, the field shaping region functions as a capacitor dielectric region rather than a resistive region, there is substantially no space charge in the field shaping region, and within the drift region there is a charge balance between the space charge in the first capacitor electrode region, together with the drain drift region, and the second capacitor electrode region. That is to say, the charge in the drain drift region plus the charge in the first capacitor electrode region compensates the charge of the second capacitor electrode region. It is an applied voltage which capacitively generates the substantially constant electric field in the field shaping region in that invention rather than the leakage current applied through the field shaping region which is provided in the arrangement disclosed in WO-A-01/59847. Also, the problem with the arrangement of U.S. Pat. No. 4,754,310 of providing a precise charge balance between the two opposite conductivity type regions along the length of the drift region does not arise in the arrangement of WO-A-03/043089.
In WO-A-03/043089 the field shaping region is described as being intrinsic semiconductor material, or being extrinsic semiconductor material which is lower doped than the drift region, or being semi-insulating material, for example comprising one of oxygen doped polycrystalline silicon and nitrogen doped polycrystalline silicon. The first capacitor electrode region may be a semiconductor region of one conductivity type with the second capacitor electrode region being a semiconductor region of opposite conductivity type to the first capacitor electrode region. In this case the different electron energy barriers of the first and second capacitor electrode regions are provided by the different work functions of the two semiconductor conductivity types. Alternatively, the first capacitor electrode region may be a semiconductor region with the second capacitor electrode region being a Schottky barrier region. In this case the work function of the first capacitor electrode semiconductor region is an electron energy barrier which is different from the Schottky electron energy barrier of the second capacitor electrode Schottky barrier region. In both cases as just specified, the first capacitor electrode region semiconductor region is of the same conductivity type as the drain region. The transistor may be an insulated gate field effect transistor. This may be a vertical transistor which may be a trench-gate transistor.